BCM2712 Technology Analysis Report

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Broadcom BCM2712 D0 stepping dieshot
Broadcom BCM2712 D0 stepping dieshot

Free Technology Analysis Report

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This report demonstrates Chipwise’s complete reverse-engineering workflow, including package analysis, floorplan annotation, critical dimension measurements and cost estimation.

This report is provided free of charge for evaluation purposes. For commercial or custom analysis projects, please contact us.

Project Details

Frontside view BCM2712 chip D0 stepping 2023

BCM2712 (D0 stepping) - Raspberry Pi 5 SoC

Chipwise has completed a full physical analysis of the Broadcom BCM2712 System-on-Chip used in the Raspberry Pi 5.
This report focuses on the cost-optimized D0 stepping, which was introduced in 2024. Compared with the earlier C0/C1 version, the die has been reduced from 55.3 mm² to 32.4 mm² — a shrink of approximately 41 % — by removing unused functional blocks (“dark silicon”).

Key findings include:

  • TSMC 16 nm FinFET process confirmation
  • 12 metal layers
  • Detailed floorplan with functional block areas
  • Critical dimensions extracted from FIB and STEM cross-sections
  • SRAM type 1 capacity measurement (~5.9MB)
  • Package and assembly analysis (including embedded cross-section)

See also Die shot analysis of the predecessor C0/C1 stepping 2022 here 

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